57 search results - page 2 / 12 » Reconfigurable Architecture for Network Flow Analysis |
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
Hardware accelerators are increasingly used to extend the computational capabilities of baseline scalar processors to meet the growing performance and power requirements of embedd...
DSD
2010
IEEE
13 years 3 months ago
2010
IEEE
Reconfigurable FPGA based Systems-on-Chip (SoC) architectures are increasingly becoming the preferred solution for implementing modern embedded systems, due to their flexible natur...
FCCM
2006
IEEE
13 years 11 months ago
2006
IEEE
This paper presents a novel reconfigurable data flow processing architecture that promises high performance by explicitly targeting both fine- and course-grained parallelism. This...
FPL
2006
Springer
13 years 8 months ago
2006
Springer
This paper presents an implementation of a high-performance network application layer parser in FPGAs. At the core of the architecture resides a pattern matcher and a parser. The ...
FPGA
2006
ACM
13 years 8 months ago
2006
ACM
In this paper, we develop an architecture for principal component analysis (PCA) to be used as an outlier detection method for high-speed network intrusion detection systems (NIDS...