25 search results - page 4 / 5 » Rectilinear Steiner Trees with Minimum Elmore Delay |
ISPD
1997
ACM
13 years 9 months ago
1997
ACM
The wire sizing problem under inequality Elmore delay constraints is known to be posynomial, hence convex under an exponential variable-transformation. There are formal methods fo...
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
Abstract— Routing tree construction is a fundamental problem in modern VLSI design. In this paper we propose CDCTree, an Obstacle-Avoiding Rectilinear Steiner Minimum Tree (OARSM...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
- Routing is one of the important steps in VLSI/ULSI physical design. The rectilinear Steiner minimum tree (RSMT) construction is an essential part of routing. Since macro cells, I...
GLVLSI
2010
IEEE
13 years 7 months ago
2010
IEEE
For timing-driven or yield-driven designs, non-tree routing has become more and more popular and additional loops provide the redundant paths to protect against the effect of the ...
TCAD
2002
13 years 4 months ago
2002
Abstract--This paper presents a solution to the problem of performance-driven buffered routing tree generation for VLSI circuits. Using a novel bottom-up construction algorithm and...