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ASPDAC
2008
ACM
108views Hardware» more  ASPDAC 2008»
13 years 7 months ago
Synthesis and design of parameter extractors for low-power pre-computation-based content-addressable memory using gate-block sel
Content addressable memory (CAM) is frequently used in applications, such as lookup tables, databases, associative computing, and networking, that require high-speed searches due t...
Jui-Yuan Hsieh, Shanq-Jang Ruan
GECCO
2010
Springer
169views Optimization» more  GECCO 2010»
13 years 8 months ago
Robust symbolic regression with affine arithmetic
We use affine arithmetic to improve both the performance and the robustness of genetic programming for symbolic regression. During evolution, we use affine arithmetic to analyze e...
Cassio Pennachin, Moshe Looks, João A. de V...
CEC
2007
IEEE
13 years 7 months ago
Fitness inheritance in evolutionary and multi-objective high-level synthesis
Abstract—The high-level synthesis process allows the automatic design and implementation of digital circuits starting from a behavioral description. Evolutionary algorithms are v...
Christian Pilato, Gianluca Palermo, Antonino Tumeo...
HPCC
2007
Springer
13 years 11 months ago
Parallel Genetic Algorithms for DVS Scheduling of Distributed Embedded Systems
Many of today’s embedded systems, such as wireless and portable devices rely heavily on the limited power supply. Therefore, energy efficiency becomes one of the major design con...
Man Lin, Chen Ding
INTEGRATION
2006
102views more  INTEGRATION 2006»
13 years 5 months ago
A parameterized graph-based framework for high-level test synthesis
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...
Saeed Safari, Amir-Hossein Jahangir, Hadi Esmaeilz...