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FMCAD
2006
Springer
13 years 9 months ago
Reducing Verification Complexity of a Multicore Coherence Protocol Using Assume/Guarantee
Xiaofang Chen, Yu Yang, Ganesh Gopalakrishnan, Chi...
NOCS
2008
IEEE
13 years 11 months ago
Reducing the Interconnection Network Cost of Chip Multiprocessors
This paper introduces a cost-effective technique to deal with CMP coherence protocol requirements from the interconnection network point of view. A mechanism is presented to avoid...
Pablo Abad, Valentin Puente, José-Án...
CODES
2011
IEEE
12 years 5 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu
MICRO
2008
IEEE
137views Hardware» more  MICRO 2008»
13 years 5 months ago
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Verification of chip multiprocessor memory systems remains challenging. While formal methods have been used to validate protocols, simulation is still the dominant method used to ...
Ofer Shacham, Megan Wachs, Alex Solomatnikov, Amin...
BIOSIG
2009
152views Biometrics» more  BIOSIG 2009»
13 years 3 months ago
A Survey of Distributed Biometric Authentication Systems
: In ACISP'07, Bringer et al proposed a new approach for remote biometric based verification, which consists of a hybrid protocol that distributes the server side functionalit...
Neyire Deniz Sarier