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NOCS
2008
IEEE

Reducing the Interconnection Network Cost of Chip Multiprocessors

13 years 10 months ago
Reducing the Interconnection Network Cost of Chip Multiprocessors
This paper introduces a cost-effective technique to deal with CMP coherence protocol requirements from the interconnection network point of view. A mechanism is presented to avoid the end-to-end deadlock that arises from the dependency chains created at the network interfaces between the different message types handled by coherence protocols. Our proposal is designed to guarantee a fraction of end-toend bandwidth for the highest priority messages and makes it unnecessary to employ several virtual networks or complex mechanisms for dealing with the limited capacity of the endpoint buffers. The presented approach uses the Rotary Router as its starting point, extending the original mechanism for the routingdependent deadlock to the message-dependent deadlock. We also propose a solution that guarantees point-to-point message ordering in this router, which is a common requirement in some coherence protocols. Results for synthetic and parallel applications show that the proposal improves th...
Pablo Abad, Valentin Puente, José-Án
Added 01 Jun 2010
Updated 01 Jun 2010
Type Conference
Year 2008
Where NOCS
Authors Pablo Abad, Valentin Puente, José-Ángel Gregorio
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