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ICCD
2003
IEEE
147views Hardware» more  ICCD 2003»
14 years 2 months ago
An Efficient VLIW DSP Architecture for Baseband Processing
The VLIW processors with static instruction scheduling and thus deterministic execution times are very suitable for highperformance real-time DSP applications. But the two major w...
Tay-Jyi Lin, Chin-Chi Chang, Chen-Chia Lee, Chein-...
MSS
1999
IEEE
166views Hardware» more  MSS 1999»
13 years 9 months ago
A 64-bit, Shared Disk File System for Linux
In computer systems today, speed and responsiveness is often determined by network and storage subsystem performance. Faster, more scalable networking interfaces like Fibre Channe...
Kenneth W. Preslan, Andrew P. Barry, Jonathan Bras...
DAC
2006
ACM
14 years 6 months ago
Exploiting forwarding to improve data bandwidth of instruction-set extensions
Application-specific instruction-set extensions (custom instructions) help embedded processors achieve higher performance. Most custom instructions offering significant performanc...
Ramkumar Jayaseelan, Haibin Liu, Tulika Mitra
MICRO
1998
IEEE
91views Hardware» more  MICRO 1998»
13 years 9 months ago
Effective Cluster Assignment for Modulo Scheduling
Clustering is one solution to the demand for wideissue machines and fast clock cycles because it allows for smaller, less ported register files and simpler bypass logic while rema...
Erik Nystrom, Alexandre E. Eichenberger
DAC
2007
ACM
14 years 6 months ago
Automatic Verification of External Interrupt Behaviors for Microprocessor Design
Interrupt behaviors, especially the external ones, are difficult to verify in a microprocessor design project in that they involve both interacting hardware and software. This pap...
Fu-Ching Yang, Wen-Kai Huang, Ing-Jer Huang