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FPL
2006
Springer
132views Hardware» more  FPL 2006»
13 years 9 months ago
Adaptive FPGAs: High-Level Architecture and a Synthesis Method
This paper presents preliminary work exploring adaptive field programmable gate arrays (AFPGAs). An AFPGA is adaptative in the sense that the functionality of subcircuits placed o...
Valavan Manohararajah, Stephen Dean Brown, Zvonko ...
CORR
2006
Springer
116views Education» more  CORR 2006»
13 years 5 months ago
Memory Aware High-Level Synthesis for Embedded Systems
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
Gwenolé Corre, Eric Senn, Nathalie Julien, ...
ISSS
1997
IEEE
103views Hardware» more  ISSS 1997»
13 years 10 months ago
A Source-Level Dynamic Analysis Methodology and Tool for High-Level Synthesis
This paper presents a novel source-level dynamic analysis methodology and tool for High-Level Synthesis (HLS). It not only for the first time enables HLS to offer source-level de...
Chih-Tung Chen, Kayhan Küçük&cced...
ASPDAC
2007
ACM
135views Hardware» more  ASPDAC 2007»
13 years 9 months ago
A Parameterized Architecture Model in High Level Synthesis for Image Processing Applications
- Most image processing applications are computationally intensive and data intensive. Reconfigurable hardware boards provide a convenient and flexible solution to speed up these a...
Yazhuo Dong, Yong Dou
ISSS
1995
IEEE
109views Hardware» more  ISSS 1995»
13 years 9 months ago
1995 high level synthesis design repository
In this paper we brie y describe a set of designs that can serve as examples for High Level Synthesis (HLS) systems. The designs vary in complexity from simple behavioral nite st...
Preeti Ranjan Panda, Nikil D. Dutt