90 search results - page 1 / 18 » Reliability-Conscious Process Scheduling under Performance C... |
IPPS
2005
IEEE
13 years 10 months ago
2005
IEEE
This paper proposes, for the FPGA-based embedded systems, a reliability-aware process scheduling strategy that operates under performance bounds. A unique characteristic of the pr...
DAC
2010
ACM
13 years 8 months ago
2010
ACM
With the ever-increasing transistor variability in CMOS technology, it is essential to integrate variation-aware performance analysis into the task allocation and scheduling proce...
DATE
2000
IEEE
13 years 9 months ago
2000
IEEE
This paper presents a new approach on combined highlevel synthesis and partitioning for FPGA-based multi-chip emulation systems. The goal is to synthesize a prototype with maximal...
DAC
2001
ACM
14 years 5 months ago
2001
ACM
Power-aware systems are those that must make the best use of available power. They subsume traditional low-power systems in that they must not only minimize power when the budget ...
CODES
2008
IEEE
13 years 6 months ago
2008
IEEE
We study the problem of scheduling repetitive real-time tasks with the Earliest Deadline First (EDF) policy that can guarantee the given maximal temperature constraint. We show th...