6 search results - page 1 / 2 » Robust Analog Circuit Sizing Using Ellipsoid Method and Affi... |
ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
-- Analog circuit sizing under process/parameter variations is formulated as a mini-max geometric programming problem. To tackle such problem, we present a new method that combines...
ASPDAC
2008
ACM
13 years 6 months ago
2008
ACM
The impact of parameter variations in integrated analog circuits is usually analyzed by Monte Carlo methods with a high number of simulation runs. Few approaches based on interval ...
DATE
2002
IEEE
13 years 9 months ago
2002
IEEE
In this paper, a method for nominal design of analog integrated circuits is presented that includes process variations and operating ranges by worst-case parameter sets. These set...
DAC
2005
ACM
14 years 5 months ago
2005
ACM
We present an efficient optimization scheme for gate sizing in the presence of process variations. Using a posynomial delay model, the delay constraints are modified to incorporat...
TCAD
2008
13 years 4 months ago
2008
We present an efficient optimization scheme for gate sizing in the presence of process variations. Our method is a worst-case design scheme, but it reduces the pessimism involved i...