55 search results - page 10 / 11 » Run-time compaction of FPGA designs |
ICCAD
1995
IEEE
13 years 9 months ago
1995
IEEE
—A problem in technology mapping is that the quality of the final implementation depends significantly on the initially provided circuit structure. This problem is critical, es...
CEC
2010
IEEE
13 years 7 months ago
2010
IEEE
Embodying robot morphologies evolved in simulation can present serious problems for an engineer when translating simplified simulated mechanisms into working devices, often drawing...
GLVLSI
2007
IEEE
14 years 16 days ago
2007
IEEE
Threshold logic is gaining prominence as an alternative to Boolean logic. The main reason for this trend is the availability of devices that implement these circuits efficiently (...
GLVLSI
2007
IEEE
13 years 10 months ago
2007
IEEE
This paper presents a pipelined architecture of a modular Montgomery multiplier, which is suitable to be used in public key coprocessors. Starting from a baseline implementation o...
ERSA
2007
13 years 7 months ago
2007
The emergence of high-density reconfigurable hardware devices gives scientists and engineers an option to accelerating their numerical computing applications on low-cost but power...