3 search results - page 1 / 1 » Scalability of 3D-Integrated Arithmetic Units in High-Perfor... |
DAC
2007
ACM
14 years 5 months ago
2007
ACM
Three-Dimensional integration provides a simultaneous improvement in wire-related delay and power consumption of microprocessor circuits. Prior work has looked at the performance,...
VLSID
2007
IEEE
14 years 5 months ago
2007
IEEE
Interconnect is one of the major concerns in current and future microprocessor designs from both performance and power consumption perspective. The emergence of three-dimensional ...
ARITH
2001
IEEE
13 years 8 months ago
2001
IEEE
The Instruction Set Architecture (ISA) of a programmable processor is the native languageof the machine. It defines the set of operations and resourcesthat are optimized for that ...