22 search results - page 4 / 5 » Scalable Test Generators for High-Speed Datapath Circuits |
FPGA
2003
ACM
13 years 11 months ago
2003
ACM
This paper presents a new power saving, high speed FPGA design enhancing a previous SiGe CML FPGA based on the Xilinx 6200 FPGA. The design aims at having a higher performance but...
ICNS
2007
IEEE
14 years 8 days ago
2007
IEEE
The second generation of Advanced Telecom Computing Architecture (ATCA) based on PCI Industrial Computer Manufacturers Group (PICMG) specification has evolved to a live deployment...
DAC
2005
ACM
14 years 7 months ago
2005
ACM
We present an efficient search strategy for satisfiability checking on circuits represented at the register-transfer-level (RTL). We use the RTL circuit structure by extending con...
VLSID
2007
IEEE
14 years 6 months ago
2007
IEEE
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
DAC
2003
ACM
14 years 7 months ago
2003
ACM
Software-based self-test (SBST) is an emerging approach to address the challenges of high-quality, at-speed test for complex programmable processors and systems-on chips (SoCs) th...