17 search results - page 1 / 4 » Scheduling Reusable Instructions for Power Reduction |
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
ISLPED
2005
ACM
13 years 10 months ago
2005
ACM
The instruction scheduling logic used in modern superscalar microprocessors often relies on associative searching of the issue queue entries to dynamically wakeup instructions for...
EMSOFT
2005
Springer
13 years 10 months ago
2005
Springer
Power leakage constitutes an increasing fraction of the total power consumption in modern semiconductor technologies. Recent research efforts have tried to integrate architecture...
ISVLSI
2008
IEEE
13 years 11 months ago
2008
IEEE
Intelligent mobile information devices require lowpower and high-performance processors. In order to reduce energy consumption with maintaining computing performance, we proposed ...
FCCM
2006
IEEE
13 years 10 months ago
2006
IEEE
In this paper, we investigate a combination of two techniques — instruction coding and instruction re-ordering — for optimizing energy in embedded processor control. We presen...