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IPPS
2007
IEEE
13 years 11 months ago
Experience of Optimizing FFT on Intel Architectures
Automatic library generators, such as ATLAS [11], Spiral [8] and FFTW [2], are promising technologies to generate efficient code for different computer architectures. The library...
Daniel Orozco, Liping Xue, Murat Bolat, Xiaoming L...
HPDC
2005
IEEE
13 years 11 months ago
Genetic algorithm based automatic data partitioning scheme for HPF
good data partitioning scheme is the need of the time. However it is very diflcult to arrive at a good solution as the number of possible dutupartitionsfor a given real lifeprogra...
Sunil Kumar Anand, Y. N. Srikant
AIPS
1994
13 years 6 months ago
Using AI Planning Techniques to Automatically Generate Image Processing Procedures
This paper describes work on the Multimission VICARPlanner (MVP) system to automatically construct executable imageprocessing procedures for custom image processing requests for t...
Steve A. Chien
VLSID
2007
IEEE
154views VLSI» more  VLSID 2007»
14 years 5 months ago
Model Based Test Generation for Microprocessor Architecture Validation
Functional validation of microprocessors is growing in complexity in current and future microprocessors. Traditionally, the different components (or validation collaterals) used i...
Sreekumar V. Kodakara, Deepak Mathaikutty, Ajit Di...
MEMICS
2010
13 years 1 days ago
Instructor Selector Generation from Architecture Description
We describe an automated way to generate data for a practical LLVM instruction selector based on machine-generated description of the target architecture at register transfer leve...
Miloslav Trmac, Adam Husar, Jan Hranac, Tomas Hrus...