Sciweavers

68 search results - page 1 / 14
» Self-Calibrating Clocks for Globally Asynchronous Locally Sy...
Sort
View
ICCD
2000
IEEE
99views Hardware» more  ICCD 2000»
14 years 1 months ago
Self-Calibrating Clocks for Globally Asynchronous Locally Synchronous Systems
We present a local clocking mechanism based on a tunable delay line which calibrates itself from a low frequency global clock. After initial tuning, the local clock remains calibr...
Simon W. Moore, George S. Taylor, Paul A. Cunningh...
ISVLSI
2006
IEEE
115views VLSI» more  ISVLSI 2006»
13 years 10 months ago
Performance and Power Analysis of Globally Asynchronous Locally Synchronous Multi-Processor Systems
This paper investigates the performance and power dissipation of Globally Asynchronous Locally Synchronous (GALS) multi-processor systems. We show that communication loops are a s...
Zhiyi Yu, Bevan M. Baas
ISCA
2002
IEEE
105views Hardware» more  ISCA 2002»
13 years 9 months ago
Power and Performance Evaluation of Globally Asynchronous Locally Synchronous Processors
Due to shrinking technologies and increasing design sizes, it is becoming more difficult and expensive to distribute a global clock signal with low skew throughout a processor di...
Anoop Iyer, Diana Marculescu
ASYNC
2002
IEEE
115views Hardware» more  ASYNC 2002»
13 years 9 months ago
Point to Point GALS Interconnect
Reliable, low-latency channel communication between independent clock domains may be achieved using a combination of clock pausing techniques, self-calibrating delay lines and an ...
George S. Taylor, Simon W. Moore, Robert D. Mullin...
ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
13 years 10 months ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu