18 search results - page 1 / 4 » Sequential equivalence checking using cuts |
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
DAC
1997
ACM
13 years 9 months ago
1997
ACM
This paper presents a verification technique which is specifically targeted to formally comparing large combinational circuits with some structural similarities. The approach co...
FMCAD
2008
Springer
13 years 6 months ago
2008
Springer
Performing synthesis and verification in isolation has two undesirable consequences: (1) verification runs the risk of becoming intractable, and (2) strong sequential optimization...
ISSTA
2006
ACM
13 years 11 months ago
2006
ACM
We present a method to verify the correctness of parallel programs that perform complex numerical computations, including computations involving floating-point arithmetic. The me...
GLVLSI
2005
IEEE
13 years 10 months ago
2005
IEEE
Boolean Satisfiability (SAT) solvers are popular engines used throughout the verification world. Bounded sequential problems such as bounded model checking and bounded sequentia...