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» Serial-link bus: a low-power on-chip bus architecture
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DAC
2000
ACM
14 years 7 months ago
COSY communication IP's
The Esprit/OMI-COSY project defines transaction-levels to set-up the exchange of IP's in separating function from architecture and body-behavior from proprietary interfaces. ...
Erwin A. de Kock, Frédéric Pé...
VLSID
2002
IEEE
128views VLSI» more  VLSID 2002»
14 years 6 months ago
System-Level Point-to-Point Communication Synthesis using Floorplanning Information
: In this paper, we present a point-to-point (P2P) communication synthesis methodology for SystemOn-Chip (SOC) design. We consider real-time systems where IP selection, mapping and...
Jingcao Hu, Yangdong Deng, Radu Marculescu
SIGMOD
1998
ACM
142views Database» more  SIGMOD 1998»
13 years 5 months ago
A Case for Intelligent Disks (IDISKs)
Abstract: Decision support systems (DSS) and data warehousing workloads comprise an increasing fraction of the database market today. I/O capacity and associated processing require...
Kimberly Keeton, David A. Patterson, Joseph M. Hel...
PPL
2008
185views more  PPL 2008»
13 years 6 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
CODES
2000
IEEE
13 years 10 months ago
Parameterized system design
Continued growth in chip capacity has led to new methodologies stressing reuse, not only of pre-designed processing components, but even of entire pre-designed architectures. To b...
Tony Givargis, Frank Vahid