10 search results - page 2 / 2 » Simultaneous shield and repeater insertion |
ISPD
2000
ACM
13 years 9 months ago
2000
ACM
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
We present an analytic formula for repeater insertion in global interconnects that simultaneously minimizes silicon device area and power dissipation for a given performance qrj,/...
ISLPED
2007
ACM
13 years 6 months ago
2007
ACM
This paper addresses the problem of power-optimal repeater insertion for global buses in the presence of crosstalk noise. MTCMOS technique by inserting high-Vth sleep transistors ...
DATE
1998
IEEE
13 years 9 months ago
1998
IEEE
Interconnect tuning is an increasingly critical degree of freedom in the physical design of high-performance VLSI systems. By interconnect tuning, we refer to the selection of lin...
DAC
2002
ACM
14 years 6 months ago
2002
ACM
Conventional global routing minimizes total wire length and congestion. Experiments using large industrial benchmark circuits show that up to 24% of nets in such routing solutions...