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» SmartBridge: A scalable bridge architecture
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FPL
2005
Springer
112views Hardware» more  FPL 2005»
13 years 10 months ago
Defect-Tolerant FPGA Switch Block and Connection Block with Fine-Grain Redundancy for Yield Enhancement
Future process nodes have such small feature sizes that there will be an increase in the number of manufacturing defects per die. For large FPGAs, it will be critical to tolerate ...
Anthony J. Yu, Guy G. Lemieux
ICPP
2005
IEEE
13 years 11 months ago
Integrated Performance Monitoring of a Cosmology Application on Leading HEC Platforms
The Cosmic Microwave Background (CMB) is an exquisitely sensitive probe of the fundamental parameters of cosmology. Extracting this information is computationally intensive, requi...
Julian Borrill, Jonathan Carter, Leonid Oliker, Da...
CGO
2008
IEEE
13 years 11 months ago
Parallel-stage decoupled software pipelining
In recent years, the microprocessor industry has embraced chip multiprocessors (CMPs), also known as multi-core architectures, as the dominant design paradigm. For existing and ne...
Easwaran Raman, Guilherme Ottoni, Arun Raman, Matt...
HICSS
2003
IEEE
143views Biometrics» more  HICSS 2003»
13 years 10 months ago
Formation, Routing, and Maintenance Protocols for the BlueRing Scatternet of Bluetooths
The basic networking unit in Bluetooth is piconet, and a larger-area Bluetooth network can be formed by multiple piconets, called scatternet. However, the structure of scatternets...
Ting-Yu Lin, Yu-Chee Tseng, Keng-Ming Chang, Chun-...
ASPLOS
2010
ACM
14 years 5 days ago
Speculative parallelization using software multi-threaded transactions
With the right techniques, multicore architectures may be able to continue the exponential performance trend that elevated the performance of applications of all types for decades...
Arun Raman, Hanjun Kim, Thomas R. Mason, Thomas B....