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    VLSID
    2007
    IEEE
    120views VLSI» more  VLSID 2007»
    Interframe Bus Encoding Technique for Low Power Video Compression
    14 years 5 months ago
    Interframe Bus Encoding Technique for Low Power Video Compression
    Download  www.see.ed.ac.uk
    This paper proposes a data encoder to reduce switched capacitance on system bus. Our method focuses on transferring raw video data (pixels) between off-chip memory and on-chip mem...
    Asral Bahari, Tughrul Arslan, Ahmet T. Erdogan
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    DATE
    1998
    IEEE
    141views Hardware» more  DATE 1998»
    Address Bus Encoding Techniques for System-Level Power Optimization
    13 years 9 months ago
    Address Bus Encoding Techniques for System-Level Power Optimization
    Download  www.cs.ucr.edu
    The power dissipated by system-level buses is the largest contribution to the global power of complex VLSI circuits. Therefore, the minimization of the switching activity at the I...
    Luca Benini, Giovanni De Micheli, Donatella Sciuto...
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    DAC
    2009
    ACM
    135views Computer Architecture» more  DAC 2009»
    Designing heterogeneous ECU networks via compact architecture encoding and hybrid timing analysis
    14 years 5 months ago
    Designing heterogeneous ECU networks via compact architecture encoding and hybrid timing analysis
    Download  www12.informatik.uni-erlangen.de
    In this paper, a design method for automotive architectures is proposed. The two main technical contributions are (i) a novel hardware/software architecture encoding that unifies ...
    Jürgen Teich, Martin Lukasiewycz, Michael Gla...
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    ISICT
    2003
    115views Information Technology» more  ISICT 2003»
    An evolutionary approach for reducing the energy in address buses
    13 years 6 months ago
    An evolutionary approach for reducing the energy in address buses
    Download  www.diit.unict.it
    In this paper we present a genetic approach for the efficient generation of an encoder to minimize switching activity on the high-capacity lines of a communication bus. The appro...
    Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
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    VLSID
    2005
    IEEE
    140views VLSI» more  VLSID 2005»
    A Novel Bus Encoding Scheme from Energy and Crosstalk Efficiency Perspective for AMBA Based Generic SoC Systems
    14 years 5 months ago
    A Novel Bus Encoding Scheme from Energy and Crosstalk Efficiency Perspective for AMBA Based Generic SoC Systems
    Download  www.see.ed.ac.uk
    Inter-wire coupling is a major source of power consumption and delay faults for on-chip buses implemented in UDSM SoC Systems. Elimination or minimization of such faults is crucia...
    Zahid Khan, Tughrul Arslan, Ahmet T. Erdogan
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