100 search results - page 20 / 20 » Stream Compilation for Real-Time Embedded Multicore Systems |
RTAS
2005
IEEE
13 years 10 months ago
2005
IEEE
While caches have become invaluable for higher-end architectures due to their ability to hide, in part, the gap between processor speed and memory access times, caches (and partic...
JSA
2008
13 years 4 months ago
2008
Commercial designs are currently integrating from 10 to 100 embedded processors in a single system on chip (SoC) and the number is likely to increase significantly in the near fut...
LCTRTS
2005
Springer
13 years 10 months ago
2005
Springer
Software pipelining is a critical optimization for producing efficient code for VLIW/EPIC and superscalar processors in highperformance embedded applications such as digital sign...
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
CODES
2005
IEEE
13 years 10 months ago
2005
IEEE
Even after carefully tuning the memory characteristics to the application properties and the processor speed, during the execution of real applications there are times when the pr...