26 search results - page 2 / 6 » Synthesis of 2-Commodity Flow Networks |
ICCAD
2000
IEEE
13 years 10 months ago
2000
IEEE
— Sub-micron feature sizes have resulted in a considerable portion of power to be dissipated on the buses, causing an increased attention on savings for power at the behavioral l...
TCAD
2010
13 years 1 months ago
2010
Three-dimensional integrated circuits (3D-ICs) are a promising approach to address the integration challenges faced by current systems on chips (SoCs). Designing an efficient netwo...
CODES
2006
IEEE
14 years 10 days ago
2006
IEEE
Lowering down the chip temperature is becoming one of the important design considerations, since temperature adversely and seriously affects many of design qualities, such as reli...
ICCAD
1992
IEEE
13 years 10 months ago
1992
IEEE
This paper presents a comprehensive timing model for behavioral-level specifications and algorithms for timing analysis in high-level synthesis. It is based on a timing network wh...
DATE
2008
IEEE
14 years 22 days ago
2008
IEEE
This paper describes an implementation language and synthesis system for automatically generating latency insensitive synchronous digital designs. These designs decouple behaviora...