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» Synthesis of CMOS Analog Cells Using AMIGO
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DATE
2009
IEEE
111views Hardware» more  DATE 2009»
14 years 6 days ago
Enabling concurrent clock and power gating in an industrial design flow
— Clock-gating and power-gating have proven to be very effective solutions for reducing dynamic and static power, respectively. The two techniques may be coupled in such a way th...
Leticia Maria Veiras Bolzani, Andrea Calimera, Alb...
DATE
2006
IEEE
142views Hardware» more  DATE 2006»
13 years 11 months ago
Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...
ISCAS
2006
IEEE
133views Hardware» more  ISCAS 2006»
13 years 11 months ago
Neuronal ion-channel dynamics in silicon
Abstract— We present a simple silicon circuit for modelling voltagedependent ion channels found within neural cells, capturing both the gating particle’s sigmoidal activation (...
Kai M. Hynna, Kwabena Boahen