65 search results - page 1 / 13 » System Level Simulation of Autonomic SoCs with TAPES |
ARCS
2008
Springer
13 years 6 months ago
2008
Springer
GLVLSI
2006
IEEE
13 years 10 months ago
2006
IEEE
Reliability has become a significant challenge for system design in new process technologies. Higher integration levels dramatically increase power densities, which leads to high...
CASES
2006
ACM
13 years 10 months ago
2006
ACM
Designers of SoCs with non-digital components, such as analog or MEMS devices, can currently use high-level system design languages, such as SystemC, to model only the digital par...
ISSS
2002
IEEE
13 years 9 months ago
2002
IEEE
Currently, since many SoCs include heterogeneous components such as CPUs, DSPs, ASICs, memories, buses, etc., system integration becomes a major step in the design flow. To enable...
TVLSI
2008
13 years 4 months ago
2008
Lifetime concerns for complex systems-on-a-chip (SoC) designs due to decreasing levels in reliability motivate the development of solutions to ensure reliable operation. A precurso...