5744 search results - page 1 / 1149 » System level design, a VHDL based approach |
EURODAC
1995
IEEE
13 years 8 months ago
1995
IEEE
A hierarchical system design flow was developed to facilitate concurrent development and Time-to-Market reductions. The system design flow provides for codesign of (embedded) driv...
EUROMICRO
2000
IEEE
13 years 9 months ago
2000
IEEE
We propose a design flow for low-power and low-cost, data-dominated, embedded systems which tightly integrate different technologies and architectures. We use Mathworks’ Simuli...
EURODAC
1994
IEEE
13 years 8 months ago
1994
IEEE
EURODAC
1994
IEEE
13 years 9 months ago
1994
IEEE
This paper presents a testability improvement method for digital systems described in VHDL behavioral specification. The method is based on testability analysis at registertransfe...
EURODAC
1994
IEEE
13 years 9 months ago
1994
IEEE
In order to master the growing complexity of analogue electronic systems, modelling and simulation of analogue hardware at various levels is absolutely necessary. This paper prese...