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EURODAC
1994
IEEE
148views VHDL» more  EURODAC 1994»
11 years 5 months ago
System-Level Modeling and Verification: a Comprehensive Design Methodology
Paolo Camurati, Fulvio Corno, Paolo Prinetto, Cath...
AHS
2007
IEEE
251views Hardware» more  AHS 2007»
11 years 5 months ago
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
Ali Ahmadinia, Balal Ahmad, Tughrul Arslan
CODES
1999
IEEE
11 years 5 months ago
An MPEG-2 decoder case study as a driver for a system level design methodology
We present a case study on the design of a heterogeneous architecture for MPEG-2 video decoding. The primary objective of the case study is the validation of the SPADE methodology...
Pieter van der Wolf, Paul Lieverse, Mudit Goel, Da...
IEICET
2006
114views more  IEICET 2006»
11 years 1 months ago
Synchronization Verification in System-Level Design with ILP Solvers
Concurrency is one of the most important issues in system-level design. Interleaving among parallel processes can cause an extremely large number of different behaviors, making de...
Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro ...
ICCD
2007
IEEE
133views Hardware» more  ICCD 2007»
11 years 10 months ago
System level power estimation methodology with H.264 decoder prediction IP case study
This paper presents a methodology to generate a hierarchy of power models for power estimation of custom hardware IP blocks, enabling a trade-off between power estimation accuracy...
Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi,...
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