Abstract. Performance evaluation of the Advanced Encryption Standard candidates has led to intensive study of both hardware and software implementations. However, although plentifu...
MorphoSys is a system-on-chip which combines a RISC processor with an array of reconfigurable cells. The important features of MorphoSys are coarse-grain granularity, dynamic reco...
Abstract. This paper proposes a method for implementing fractal image compression on dynamically reconfigurable architecture. In the encoding of this compression, metric computatio...
ABSTRACT. Reconfigurable systolic arrays can be adapted to efficiently resolve a wide spectrum of computational problems; parallelism is naturally explored in systolic arrays and r...
Adaptive systems are set to become more mainstream, as numerous practical applications in the communications domain emerge. FPGAs offer an ideal implementation platform, combining...
Suhaib A. Fahmy, Jorg Lotze, Juanjo Noguera, Linda...