3 search results - page 1 / 1 » TMR and Partial Dynamic Reconfiguration to mitigate SEU faul... |
DFT
2007
IEEE
13 years 8 months ago
2007
IEEE
This paper presents the adoption of the Triple Modular Redundancy coupled with the Partial Dynamic Reconfiguration of Field Programmable Gate Arrays to mitigate the effects of Sof...
IJES
2006
13 years 4 months ago
2006
This paper describes novel methods of exploiting the partial, dynamic reconfiguration capabilities of Xilinx Virtex V1000 FPGAs to manage single-event upset (SEU) faults due to rad...
FPL
2009
Springer
13 years 9 months ago
2009
Springer
Commercial SRAM-based FPGAs have the potential to provide aerospace applications with the necessary performance to meet next-generation mission requirements. However, the suscepti...