30 search results - page 6 / 6 » Temperature- and Cost-Aware Design of 3D Multiprocessor Arch... |
DAC
2009
ACM
14 years 5 months ago
2009
ACM
Within-die variation in leakage power consumption is substantial and increasing for chip-level multiprocessors (CMPs) and multiprocessor systems-on-chip. Dealing with this problem...
GLVLSI
2007
IEEE
13 years 11 months ago
2007
IEEE
Multi-Processor System-On-Chip (MPSoC) can provide the performance levels required by high-end embedded applications. However, they do so at the price of an increasing power densi...
DAC
2010
ACM
13 years 8 months ago
2010
ACM
As the geometry shrinking faces severe limitations, 3D wafer stacking with through silicon via (TSV) has gained interest for future SOC integration. Since TSV fill material and s...
JMM2
2006
13 years 4 months ago
2006
Abstract-- This paper describes a framework for constructing a three-dimensional immersive environment that can be used for training physical activities. The system is designed to ...
ASPLOS
2004
ACM
13 years 10 months ago
2004
ACM
Power density in high-performance processors continues to increase with technology generations as scaling of current, clock speed, and device density outpaces the downscaling of s...