8 search results - page 1 / 2 » Test Compression for Dynamically Reconfigurable Processors |
FPL
2010
Springer
13 years 2 months ago
2010
Springer
CSREAESA
2006
13 years 6 months ago
2006
Abstract
DFT
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper describes a methodology of creating a built-in diagnostic system of a System on Chip and experimental results of the system application on the AT94K FPSLIC with cores d...
DSD
2010
IEEE
13 years 4 months ago
2010
IEEE
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
RSP
2006
IEEE
13 years 10 months ago
2006
IEEE
This paper presents the design and the performance evaluation of a coarse-grain dynamically reconfigurable platform for network applications. The platform consists of two MicroBla...