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DATE
2004
IEEE
130views Hardware» more  DATE 2004»
13 years 9 months ago
Utilizing Formal Assertions for System Design of Network Processors
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
Xi Chen, Yan Luo, Harry Hsieh, Laxmi N. Bhuyan, Fe...
DAC
2005
ACM
13 years 7 months ago
VLIW: a case study of parallelism verification
Parallelism in processor architecture and design imposes a verification challenge as the exponential growth in the number of execution combinations becomes unwieldy. In this paper...
Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Li...
IEEEINTERACT
2002
IEEE
13 years 10 months ago
Compiling for Fine-Grain Concurrency: Planning and Performing Software Thread Integration
Embedded systems require control of many concurrent real-time activities, leading to system designs which feature multiple hardware peripherals with each providing a specific, ded...
Alexander G. Dean
IPPS
2007
IEEE
13 years 11 months ago
Optimizing Sorting with Machine Learning Algorithms
The growing complexity of modern processors has made the development of highly efficient code increasingly difficult. Manually developing highly efficient code is usually expen...
Xiaoming Li, María Jesús Garzar&aacu...
VLSISP
2008
132views more  VLSISP 2008»
13 years 5 months ago
Scenario Selection and Prediction for DVS-Aware Scheduling of Multimedia Applications
Modern multimedia applications usually have real-time constraints and they are implemented using application-domain specific embedded processors. Dimensioning a system requires acc...
Stefan Valentin Gheorghita, Twan Basten, Henk Corp...