7 search results - page 1 / 2 » Test Pattern Generation for Signal Integrity Faults on Long ... |
VTS
2002
IEEE
13 years 10 months ago
2002
IEEE
In this paper, we present a test pattern generation algorithm aiming at signal integrity faults on long interconnects. This is achieved by considering the effect of inputs and par...
ICCD
2003
IEEE
13 years 10 months ago
2003
IEEE
As the technology is shrinking toward 50 nm and the working frequency is going into multi gigahertz range, the effect of interconnects on functionality and performance of system-o...
DATE
2003
IEEE
13 years 10 months ago
2003
IEEE
As the technology is shrinking and the working frequency is going into multi gigahertz range, the issues related to interconnect testing are becoming more dominant. Specifically,...
DDECS
2007
IEEE
13 years 11 months ago
2007
IEEE
- As shown by previous studies, shorts between the interconnect wires should be considered as the predominant cause of failures in CMOS circuits. Fault models and tools for targeti...
EVOW
2001
Springer
13 years 9 months ago
2001
Springer
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...