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TVLSI
2008
89views more  TVLSI 2008»
13 years 4 months ago
Test Set Development for Cache Memory in Modern Microprocessors
Up to 53% of the time spent on testing current Intel microprocessors is needed to test on-chip caches, due to the high complexity of memory tests and to the large amount of transis...
Zaid Al-Ars, Said Hamdioui, Georgi Gaydadjiev, Sta...
ACMMSP
2005
ACM
106views Hardware» more  ACMMSP 2005»
13 years 10 months ago
Impact of modern memory subsystems on cache optimizations for stencil computations
In this work we investigate the impact of evolving memory system features, such as large on-chip caches, automatic prefetch, and the growing distance to main memory on 3D stencil ...
Shoaib Kamil, Parry Husbands, Leonid Oliker, John ...
ICS
2009
Tsinghua U.
13 years 9 months ago
Dynamic task set partitioning based on balancing memory requirements to reduce power consumption
ABSTRACT Because of technology advances power consumption has emerged up as an important design issue in modern high-performance microprocessors. As a consequence, research on redu...
Diana Bautista, Julio Sahuquillo, Houcine Hassan, ...
MICRO
1997
IEEE
141views Hardware» more  MICRO 1997»
13 years 8 months ago
Unroll-and-Jam Using Uniformly Generated Sets
Modern architectural trends in instruction-level parallelism (ILP) are to increase the computational power of microprocessors significantly. As a result, the demands on memory ha...
Steve Carr, Yiping Guan
ICIAP
2009
ACM
14 years 4 months ago
Connected Component Labeling Techniques on Modern Architectures
In this paper we present an overview of the historical evolution of connected component labeling algorithms, and in particular the ones applied on images stored in raster scan orde...
Costantino Grana, Daniele Borghesani, Rita Cucchia...