13 search results - page 1 / 3 » Test challenges for deep sub-micron technologies |
DATE
2004
IEEE
13 years 8 months ago
2004
IEEE
Due to process variations in deep sub-micron (DSM) technologies, the effects of timing defects are difficult to capture. This paper presents a novel coverage metric for estimating...
DAC
2000
ACM
14 years 5 months ago
2000
ACM
The use of deep submicron process technologies presents several new challenges in the area of manufacturing test. While a significant body of work has been devoted to identifying ...
ECTEL
2010
Springer
13 years 5 months ago
2010
Springer
Changes in the underpinning technologies for TEL is occurring at a pace that we have never before experienced, and this is unlikely to slow down. This necessitates a broader and mo...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
The progressive trend of fabrication technologies towards the nanometer regime has created a number of new physical design challenges for computer architects. Design complexity, u...
DAC
2006
ACM
13 years 10 months ago
2006
ACM
Silicon design implementation has become increasingly complex with the deep submicron technologies such as 90nm and below. It is common to see multiple processor cores, several ty...