112 search results - page 3 / 23 » Test generation in VLSI circuits for crosstalk noise |
ITC
2003
IEEE
13 years 11 months ago
2003
IEEE
A technique to derive test vectors that exercise the worstcase delay effects in a domino circuit in the presence of crosstalk is described. A model for characterizing the delay of...
DAC
2000
ACM
14 years 6 months ago
2000
ACM
The effect of crosstalk errors is most significant in highperformance circuits, mandating at-speed testing for crosstalk defects. This paper describes a self-test methodology that...
DAC
2003
ACM
13 years 11 months ago
2003
ACM
In recent years, due to rapid advances in VLSI manufacturing technology capable of packing more and more devices and wires on a chip, crosstalk has emerged as a serious problem af...
SLIP
2003
ACM
13 years 11 months ago
2003
ACM
Aggressive process scaling and increasing clock rates have made crosstalk noise an important issue in VLSI design. Switching on adjacent wires on long bus lines can increase delay...
ICCD
2006
IEEE
14 years 2 months ago
2006
IEEE
— Accurate estimation of worst-case crosstalk effects is critical for a realistic estimation of the worst-case behavior of deep sub-micron circuits. Crosstalk analysis models usu...