14 search results - page 3 / 3 » Testing and Diagnosis of Interconnect Structures in FPGAs |
CSREAESA
2009
13 years 6 months ago
2009
Two embedded processor based fault injection case studies are presented which are applicable to Field Programmable Gate Arrays (FPGAs) and FPGA cores in configurable System-on-Chip...
ET
2002
13 years 5 months ago
2002
In this paper we explore two alternative approaches to system diagnosis. The first strategy is based on testability analysis performed by SATAN tool. The second approach performed ...
ETS
2007
IEEE
13 years 11 months ago
2007
IEEE
The paper proposes a new concept of diagnosing faulty links in Network-on-a-Chip (NoC) designs. The method is based on functional fault models and it implements packet address dri...
SLIP
2005
ACM
13 years 10 months ago
2005
ACM
We propose in this paper a multilevel full-chip routing algorithm that improves testability and diagnosability, manufacturability, and signal integrity for yield enhancement. Two ...