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» Testing and built-in self-test - A survey
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VTS
2005
IEEE
101views Hardware» more  VTS 2005»
13 years 10 months ago
On-Chip Spectrum Analyzer for Analog Built-In Self Test
This paper presents the design of an on-chip spectrum analyzer. A novel architecture is used to mitigate the problems encountered in trying to implement architectures employed in ...
Anup P. Jose, Keith A. Jenkins, Scott K. Reynolds
VTS
1998
IEEE
97views Hardware» more  VTS 1998»
13 years 9 months ago
On the Identification of Optimal Cellular Automata for Built-In Self-Test of Sequential Circuits
This paper presents a BIST architecture for Finite State Machines that exploits Cellular Automata (CA) as pattern generators and signature analyzers. The main advantage of the pro...
Fulvio Corno, Nicola Gaudenzi, Paolo Prinetto, Mat...
CSREAESA
2006
13 years 6 months ago
Embedded Processor Based Built-In Self-Test and Diagnosis of Logic and Memory Resources in FPGAs
Abstract
Daniel T. Milton, Sachin Dhingra, Charles E. Strou...
DATE
2010
IEEE
161views Hardware» more  DATE 2010»
13 years 10 months ago
BISD: Scan-based Built-In self-diagnosis
Abstract—Built-In Self-Test (BIST) is less often applied to random logic than to embedded memories due to the following reasons: Firstly, for a satisfiable fault coverage it may...
Melanie Elm, Hans-Joachim Wunderlich