5 search results - page 1 / 1 » Testing the Configurable Interconnect Logic Interface of SRA... |
TCAD
2002
13 years 4 months ago
2002
As IC densities are increasing, cluster-based FPGA architectures are becoming the architecture of choice for major FPGA manufacturers. A cluster-based architecture is one in which...
DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
The objective of this paper is to define a minimum number of configurations for testing the configurable modules that interface the global interconnect and the logic cells of SRAM...
ITC
2003
IEEE
13 years 10 months ago
2003
IEEE
Abstract: We discuss the development of Built-In SelfTest (BIST) configurations that test all of the programmable logic and interconnect resources in the core of Xilinx 4000E, 4000...
TC
1998
13 years 4 months ago
1998
—The very high levels of integration and submicron device sizes used in current and emerging VLSI technologies for FPGAs lead to higher occurrences of defects and operational fau...
CSREAESA
2009
13 years 6 months ago
2009
Two embedded processor based fault injection case studies are presented which are applicable to Field Programmable Gate Arrays (FPGAs) and FPGA cores in configurable System-on-Chip...