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» The Impact of Silicon Photonics
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DATE
2009
IEEE
168views Hardware» more  DATE 2009»
14 years 24 days ago
Selective state retention design using symbolic simulation
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...
Ashish Darbari, Bashir M. Al-Hashimi, David Flynn,...
MICRO
2008
IEEE
208views Hardware» more  MICRO 2008»
14 years 13 days ago
Microarchitecture soft error vulnerability characterization and mitigation under 3D integration technology
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
Wangyuan Zhang, Tao Li
ISPD
2004
ACM
97views Hardware» more  ISPD 2004»
13 years 11 months ago
Implementation and extensibility of an analytic placer
Automated cell placement is a critical problem in VLSI physical design. New analytical placement methods that simultaneously spread cells and optimize wirelength have recently rec...
Andrew B. Kahng, Qinke Wang
ISPD
2004
ACM
134views Hardware» more  ISPD 2004»
13 years 11 months ago
Performance-driven register insertion in placement
As the CMOS technology is scaled into the dimension of nanometer, the clock frequencies and die sizes of ICs are shown to be increasing steadily [5]. Today, global wires that requ...
Dennis K. Y. Tong, Evangeline F. Y. Young
MICRO
2003
IEEE
166views Hardware» more  MICRO 2003»
13 years 11 months ago
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pa...