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ISQED
2002
IEEE
137views Hardware» more  ISQED 2002»
13 years 9 months ago
A Comprehensive Layout Methodology and Layout-Specific Circuit Analyses for Three-Dimensional Integrated Circuits
In this paper, we describe a comprehensive layout methodology for bonded three-dimensional integrated circuits (3D ICs). In bonded 3D integration technology, parts of a circuit ar...
Syed M. Alam, Donald E. Troxel, Carl V. Thompson
10
Voted
ISVLSI
2003
IEEE
91views VLSI» more  ISVLSI 2003»
13 years 10 months ago
Three-Dimensional Integrated Circuits: Performance, Design Methodology, and CAD Tools
Three-dimensional integration technologies have been proposed in order to mitigate design challenges posed by deep-submicron interconnect. By providing multiple layers of active d...
Shamik Das, Anantha Chandrakasan, Rafael Reif
NANONET
2009
Springer
200views Chemistry» more  NANONET 2009»
13 years 11 months ago
Repeater Insertion for Two-Terminal Nets in Three-Dimensional Integrated Circuits
A new approach for inserting repeaters in 3-D interconnects is proposed. The allocation of repeaters along an interplane interconnect is iteratively determined. The proposed approa...
Hu Xu, Vasilis F. Pavlidis, Giovanni De Micheli
ICCD
2005
IEEE
101views Hardware» more  ICCD 2005»
14 years 1 months ago
Three-Dimensional Cache Design Exploration Using 3DCacti
As technology scales, interconnects dominate the performance and power behavior of deep submicron designs. Three-dimensional integrated circuits (3D ICs) have been proposed as a w...
Yuh-Fang Tsai, Yuan Xie, Narayanan Vijaykrishnan, ...