Sciweavers

769 search results - page 1 / 154
» Timed Circuit Synthesis Using Implicit Methods
Sort
View
VLSID
1999
IEEE
91views VLSI» more  VLSID 1999»
13 years 8 months ago
Timed Circuit Synthesis Using Implicit Methods
The design and synthesis of asynchronous circuits is gaining importance in both the industrial and academic worlds. Timed circuits are a class of asynchronous circuits that incorp...
Robert Thacker, Wendy Belluomini, Chris J. Myers
ASYNC
2005
IEEE
132views Hardware» more  ASYNC 2005»
13 years 10 months ago
High Level Synthesis of Timed Asynchronous Circuits
This paper proposes applying a logic synthesis approach to high level synthesis from SpecC specifications to timed asynchronous gate-level circuits. The state-based logic synthes...
Tomohiro Yoneda, Atsushi Matsumoto, Manabu Kato, C...
ICCAD
1999
IEEE
125views Hardware» more  ICCAD 1999»
13 years 9 months ago
Direct synthesis of timed asynchronous circuits
This paper presents a new method to synthesize timed asynchronous circuits directly from the specification without generating a state graph. The synthesis procedure begins with a ...
Sung Tae Jung, Chris J. Myers
ICCAD
1998
IEEE
112views Hardware» more  ICCAD 1998»
13 years 8 months ago
Using precomputation in architecture and logic resynthesis
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...
Soha Hassoun, Carl Ebeling
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
13 years 9 months ago
Synthesis of asynchronous control circuits with automatically generated relative timing assumptions
This paper describes a method of synthesis of asynchronous circuits with relative timing. Asynchronous communication between gates and modules typically utilizes handshakes to ens...
Jordi Cortadella, Michael Kishinevsky, Steven M. B...