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» Timed circuits: a new paradigm for high-speed design
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FMCAD
2007
Springer
13 years 9 months ago
Circuit Level Verification of a High-Speed Toggle
As VLSI fabrication technology progresses to 65nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates verifying digital circuits using contin...
Chao Yan, Mark R. Greenstreet
APCCAS
2006
IEEE
373views Hardware» more  APCCAS 2006»
13 years 9 months ago
A New High Precision Low Offset Dynamic Comparator for High Resolution High Speed ADCs
A new low offset dynamic comparator for high resolution high speed analog-to-digital application has been designed. Inputs are reconfigured from the typical differential pair compa...
Vipul Katyal, Randall L. Geiger, Degang Chen
VLSID
2007
IEEE
142views VLSI» more  VLSID 2007»
13 years 11 months ago
Novel Architectures for High-Speed and Low-Power 3-2, 4-2 and 5-2 Compressors
The 3-2, 4-2 and 5-2 compressors are the basic components in many applications, in particular partial product summation in multipliers. In this paper novel architectures and desig...
Sreehari Veeramachaneni, Kirthi M. Krishna, Lingam...
ISCAS
2007
IEEE
96views Hardware» more  ISCAS 2007»
13 years 11 months ago
Novel High-Speed Redundant Binary to Binary converter using Prefix Networks
— Fast addition and multiplication are of paramount importance in many arithmetic circuits and processors. The use of redundant number system for efficient implementation of thes...
Sreehari Veeramachaneni, Kirthi M. Krishna, Lingam...
GLVLSI
2006
IEEE
119views VLSI» more  GLVLSI 2006»
13 years 11 months ago
PWAM signalling scheme for high speed serial link transceiver design
This paper presents a new signaling scheme called PWAM (pulse width and amplitude modulation) to obtain the optimum combination of bandwidth and performance of the serial link tra...
Rui Tang, Yong-Bin Kim