8 search results - page 1 / 2 » Timing Driven Floorplanning on Programmable Hierarchical Tar... |
FPGA
1998
ACM
13 years 9 months ago
1998
ACM
The goal of this paper is to perform a timing optimization of a circuit described by a network of cells on a target structure whose connection delays have discrete values following...
DAC
2001
ACM
14 years 5 months ago
2001
ACM
Milenko Drinic UCLA Computer Science Dep. 4732 Boelter Hall Los Angeles, CA 90095-1596 milenko@cs.ucla.edu Darko Kirovski Microsoft Research One Microsoft Way Redmond, WA 98052 da...
CODES
2006
IEEE
13 years 11 months ago
2006
IEEE
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
CASES
2006
ACM
13 years 11 months ago
2006
ACM
The continuing miniaturization of technology coupled with wireless networks has made it feasible to physically embed sensor network systems into the environment. Sensor net proces...
SUTC
2006
IEEE
13 years 11 months ago
2006
IEEE
Abstract— Sensor networks are being increasingly deployed for collecting critical data in various applications. Once deployed, a sensor network may experience faults at the indiv...