57 search results - page 11 / 12 » Timing metrics for physical design of deep submicron technol... |
DAC
2009
ACM
14 years 6 months ago
2009
ACM
Embedded cryptosystems show increased vulnerabilities to implementation attacks such as power analysis. CMOS technology trends are causing increased process variations which impac...
ICCAD
1997
IEEE
13 years 9 months ago
1997
IEEE
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
EVOW
2001
Springer
13 years 10 months ago
2001
Springer
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
ISQED
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper, we address the interconnect-driven floorplanning problem that integrates OPC-friendly bus assignment with floorplanning. Buses consist of a number of horizontal/v...
ITC
2003
IEEE
13 years 10 months ago
2003
IEEE
As technology evolves into the deep sub-micron era, signal integrity problems are growing into a major challenge. An important source of signal integrity problems is the crosstalk...