57 search results - page 3 / 12 » Timing metrics for physical design of deep submicron technol... |
DAC
1996
ACM
13 years 9 months ago
1996
ACM
This paper presents a new concept for accurate modeling and timing simulationof electronicsystems integrated in a typical VHDL design environment, taking into account the requirem...
IOLTS
2006
IEEE
13 years 11 months ago
2006
IEEE
So far, performance and reliability of circuits have been determined by worst-case characterization of silicon and environmental noise. As new deep sub-micron technologies exacerb...
GLVLSI
1999
IEEE
13 years 9 months ago
1999
IEEE
The Elmore delay is the metric of choice for performancedriven design applications due to its simple, explicit form and ease with which sensitivity information can be calculated. ...
ISCAS
2005
IEEE
13 years 11 months ago
2005
IEEE
—As process variations become a significant problem in deep sub-micron technology, a shift from deterministic static timing analysis to statistical static timing analysis for hig...
ASPDAC
2009
ACM
13 years 11 months ago
2009
ACM
— As technology scales, the delay uncertainty caused by process variations has become increasingly pronounced in deep submicron designs. In the presence of process variations, wo...