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CODES
2004
IEEE
13 years 9 months ago
Automatic synthesis of system on chip multiprocessor architectures for process networks
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishna...
JHSN
2000
112views more  JHSN 2000»
13 years 5 months ago
A hierarchical Quality of Service control architecture for configurable multimedia applications
In order to achieve the best application-level Quality-of-Service (QoS), multimedia applications need to be dynamically tuned and reconfigured to adapt to fluctuating computing an...
Baochun Li, William Kalter, Klara Nahrstedt
IEEEPACT
2009
IEEE
13 years 12 months ago
Flextream: Adaptive Compilation of Streaming Applications for Heterogeneous Architectures
Increasing demand for performance and efficiency has driven the computer industry toward multicore systems. These systems have become the industry standard in almost all segments...
Amir Hormati, Yoonseo Choi, Manjunath Kudlur, Rodr...
CORR
2010
Springer
170views Education» more  CORR 2010»
13 years 5 months ago
Slow Adaptive OFDMA Systems Through Chance Constrained Programming
Adaptive orthogonal frequency division multiple access (OFDMA) has recently been recognized as a promising technique for providing high spectral efficiency in future broadband wire...
William Weiliang Li, Ying Jun Zhang, Anthony Man-C...
HPCA
2002
IEEE
14 years 5 months ago
Quantifying Load Stream Behavior
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
Suleyman Sair, Timothy Sherwood, Brad Calder