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CODES
2004
IEEE
13 years 9 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
ICCAD
2003
IEEE
152views Hardware» more  ICCAD 2003»
14 years 2 months ago
Dynamic Fault-Tolerance and Metrics for Battery Powered, Failure-Prone Systems
Emerging VLSI technologies and platforms are giving rise to systems with inherently high potential for runtime failure. Such failures range from intermittent electrical and mechan...
Phillip Stanley-Marbell, Diana Marculescu
ICPPW
2008
IEEE
13 years 11 months ago
Energy Modeling of Processors in Wireless Sensor Networks Based on Petri Nets
Power minimization is a serious issue in wireless sensor networks to extend the lifetime and minimize costs. However, in order to gain an accurate understanding of issues regardin...
Ali Shareef, Yifeng Zhu
ICRA
2003
IEEE
104views Robotics» more  ICRA 2003»
13 years 10 months ago
Towards a dynamic actuator model for a hexapod robot
We describe a model predicting the output torque of the battery-amplifier-actuator-gear combination used on the hexapod robot RHex, based on requested PWM (PulseWidth-Modulation) ...
Dave McMordie, Chris Prahacs, Martin Buehler
FTEDA
2007
156views more  FTEDA 2007»
13 years 5 months ago
FPGA Architecture: Survey and Challenges
Field-Programmable Gate Arrays (FPGAs) have become one of the key digital circuit implementation media over the last decade. A crucial part of their creation lies in their archite...
Ian Kuon, Russell Tessier, Jonathan Rose