204 search results - page 2 / 41 » Trace Processors |
ISPASS
2009
IEEE
14 years 1 months ago
2009
IEEE
Trace-driven simulation of superscalar processors is particularly complicated. The dynamic nature of superscalar processors combined with the static nature of traces can lead to l...
ICCD
2002
IEEE
14 years 3 months ago
2002
IEEE
VLIW processors are statically scheduled processors and their performance depends on the quality of the compiler’s scheduler. We propose a scheduling scheme where the applicatio...
IPPS
2003
IEEE
13 years 11 months ago
2003
IEEE
The available Instruction Level Parallelism in Java bytecode (Java-ILP) is not readily exploitable using traditional in-order or out-of-order issue mechanisms due to dependencies ...
IPPS
1998
IEEE
13 years 10 months ago
1998
IEEE
There has been relatively little analytical work on processor optimizations for multimedia applications. With the
HPDC
2003
IEEE
13 years 11 months ago
2003
IEEE
In systems consisting of multiple clusters of processors which employ space sharing for scheduling jobs, such as our Distributed ASCI1 Supercomputer (DAS), coallocation, i.e., the...