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ASPDAC
2009
ACM
117views Hardware» more  ASPDAC 2009»
13 years 9 months ago
Dynamically reconfigurable on-chip communication architectures for multi use-case chip multiprocessor applications
– The phenomenon of digital convergence and increasing application complexity today is motivating the design of chip multiprocessor (CMP) applications with multiple use cases. Mo...
Sudeep Pasricha, Nikil Dutt, Fadi J. Kurdahi
HPCA
2008
IEEE
14 years 5 months ago
Performance and power optimization through data compression in Network-on-Chip architectures
The trend towards integrating multiple cores on the same die has accentuated the need for larger on-chip caches. Such large caches are constructed as a multitude of smaller cache ...
Reetuparna Das, Asit K. Mishra, Chrysostomos Nicop...
IWCMC
2010
ACM
13 years 5 months ago
Policy-driven workflows for mobile network management automation
Future wireless networks will experience a continuous growth regarding the number of network elements with increasingly complex interrelations between the configuration of multipl...
Raphael Romeikat, Bernhard Bauer, Tobias Bandh, Ge...
ICS
2009
Tsinghua U.
13 years 9 months ago
A comprehensive power-performance model for NoCs with multi-flit channel buffers
Large Multi-Processor Systems-on-Chip use Networks-on-Chip with a high degree of reusability and scalability for message communication. Therefore, network infrastructure is a cruc...
Mohammad Arjomand, Hamid Sarbazi-Azad