639 search results - page 4 / 128 » Tradeoffs in designing accelerator architectures for visual ... |
CODES
2006
IEEE
13 years 9 months ago
2006
IEEE
To meet the conflicting goals of high-performance low-cost embedded systems, critical application loop nests are commonly executed on specialized hardware accelerators. These loop...
ASAP
2000
IEEE
13 years 9 months ago
2000
IEEE
Sorting long sequences of keys is a problem that occurs in many different applications. For embedded systems, a uniprocessor software solution is often not applicable due to the l...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
Parallel processing using multiple processors is a well-established technique to accelerate many different classes of applications. However, as the density of chips increases, ano...
DAC
2008
ACM
14 years 6 months ago
2008
ACM
CGF
2002
13 years 5 months ago
2002
This paper presents an interactive global visualization technique for dense vector fields using levels of detail. We introduce a novel scheme which combines an error-controlled hi...